As the operating voltages and size of semiconductors continue to shrink to satisfy the demand for low power, high density semiconductor devices are being used more widely. However, high density semiconductor devices have a higher sensitivity to ionizing radiation. This phenomenon has been studied and is the subject of several papers, including several by Robert Baumann et al. The papers are xe2x80x9cNeutron-Induced Boron Fission as a Major Source of Soft Errors in Deep Submicron SRAM Devicesxe2x80x9d and xe2x80x9cBoron Compounds as a Dominant Source of Alpha Particles in Semiconductor Devices.xe2x80x9d Ionizing radiation can be defined as any electromagnetic or particulate radiation that produces ion pairs when passing through a medium. An ion, generally speaking, is simply any atom or molecule which has a resultant electric charge due to loss or gain of electrons. The charge created by the formation of the ion pairs can, upon interaction with the semiconductor device cause a disruption in an electrical signal or can corrupt information stored in localized nodes on the device. Such a failure is referred to in the art as a xe2x80x9csoft errorxe2x80x9d because only the data are corrupted while the circuit itself remains unaffected. Other sources of soft errors include electrical noise such as bit-line coupling, and other electronic effects such as cross-talk.
Prior research has focused on determining the sources of this ionizing radiation in an attempt to understand the effect of these sources on the soft error rate (SER). Three major sources of ionizing radiation have been determined. These sources are radiation from Alpha-particle emitting impurities, radiation from Cosmic Rays, and radiation from neutron capture by boron. Each source is discussed separately below.
A significant source of ionizing radiation in semiconductor devices is the result of naturally occurring radioactive particles in semiconductor materials themselves. The major radioactive impurities are uranium (the elemental symbol for which is U) and thorium (the elemental symbol for which is Th), and their progeny. 238U and 232Th both decompose to isotopes of lead, which are stable. During the decay process, 238U emits eight alpha particles, while 232Th emits six. 238U and 232Th are found throughout the materials used in the fabrication of semiconductors. They can be found in the gold used for bond wires and lid plating, filler compounds, interconnect metals, various alloys, etc. Their presence has a small, but detectable effect on the occurrence of soft errors.
Cosmic rays are extremely energetic particles moving through the universe at a speed near the speed of light. As these extremely energetic particles move through the earth""s upper atmosphere, they collide with other particles and form secondary particles. These secondary particles include neutrons (which are uncharged particles), protons (which are positively charged particles), and electrons (which are negatively charged particles). These secondary particles can cause disturbances in the semiconductor device directly or indirectly. Direct interference can occur when one or more of the secondary particles contacts the semiconductor device and has been found to be a minor effect on soft errors. Indirect interference occurs when the neutrons cause alpha particle emission indirectly, as is explained below.
The third, and most significant source of ionizing radiation affecting soft errors is indirect radiation induced from the interaction of the neutrons generated by cosmic rays with boron (the elemental symbol for which is B). Boron is used extensively in semiconductor assembly as a p-type dopant. A p-type dopant is an atom introduced in small quantities into a crystalline semiconductor where the atom attracts electrons. In this way xe2x80x9cholesxe2x80x9d are produced which effectively become positive charge carriers. Boron is also used in the formation of borophosphosilicate glass (hereafter BPSG) that is deposited on the surface of the silicon wafer during processing.
Boron, as it occurs naturally, has two isotopes, 11B and 10B. In naturally occurring boron, approximately 80% of boron atoms are 11B, and the remaining 20% are 10B. Upon absorbing a neutron (such as the neutrons generated by the influx of cosmic rays into the upper atmosphere) 10B fragments, or xe2x80x9cfissions,xe2x80x9d into an excited 7Li nucleus and an alpha particle. Both the excited 7Li nucleus and the alpha particle are capable of causing soft errors. It has been shown that, based on the amounts of boron commonly used in semiconductor manufacturing, neutron capture by 10B can cause 0.02 soft error events per hour. This rate roughly corresponds to one event every two days. Thus, the neutron capture by 10B can be a significant source of errors in computers. It has been shown that 11B is significantly less likely to undergo a fission reaction similar to 10B. 11B does absorb the neutrons, however, it does so without undergoing the fission reaction.
In order to determine how to reduce the occurrence of soft errors due to ionizing radiation and electronic noise, some understanding of the semiconductor assembly process is needed.
Two common techniques for electronically coupling an integrated circuit to an integrated circuit package are wire bond connections and flip-chip connections. Wire bond connections are the most common used in the microelectronics industry. The wire bonding process starts by mounting an integrated circuit to a substrate with its inactive backside down. Wires are then bonded between an active front side of the integrated circuit and the integrated circuit package.
U.S. Pat. No. 5,972,736, issued to Malladi et al., and assigned to the assignee of the present invention, discloses an integrated circuit package using the wire bonding process. Prior art FIG. 1 illustrates the components of an integrated circuit package. In FIG. 1, a package body 22 includes one or more land areas (not shown) having exposed electrical pads for wire bonding between a semiconductor die 28 and the land areas. The package body 22 may be formed from a variety of materials, such as alumina, glass-ceramic, and polymers with appropriate metal inter-connection layers. The land areas are connected by a conductive pattern to areas to which solder balls 42 are affixed allowing for the later surface mounting of the completed device to a printed circuit board or other substrate. Attached to the package body 22 is an attachment mechanism 146. Various materials are used for the attachment mechanism 146, including copper, aluminum, various alloys, and plastics. The attaching mechanism 146 is attached to the package body 22 by a low softening temperature adhesive 134.
The next step in the assembly process is the die attach operation. In this step, semiconductor die 28 is attached to the attachment mechanism 146 utilizing a die attach adhesive 138. Typical die attach adhesives 138 include epoxy, polyamides, metal filled polymers, ceramic filled polymers, diamond filled polymer, silver glass, or other suitable materials. After the semiconductor die 28 is attached to the attachment mechanism 146, wire bonding is performed so that a plurality of wire bonds 30 are formed between the electrical interconnects on package body 22 and bond pads (not shown) on semiconductor die 28. Next, the semiconductor die 28 and bond wires 30 are encapsulated by applying a suitable encapsulating material 49 such as an epoxy. The encapsulation material 49 serves to protect semiconductor die 28 and bond wires 30 as well as attaching semiconductor die 28 to package body 22 allowing the removal of the attachment mechanism 146.
FIG. 2 illustrates the device 140 after removal of the attachment mechanism 146 and the addition of a heat sink (not shown). In FIG. 2, the attachment mechanism 146 has been removed by heating above the softening temperature of the low softening temperature adhesive 134. The heat sink is then attached to the backside of semiconductor die 28 and package body 22 using a single layer of high thermal conductivity adhesive (not shown). The high thermal conductivity adhesive may be an epoxy or polyurethane, a thermal grease (wherein mechanical clamps are used to hold heat sink), or other thermoplastic materials with melting points of less than 200xc2x0 C.
A second method of preparing an integrated circuit package is known as flip-chip assembly. A flip-chip is a semiconductor chip (die) having bumps on the bond pads formed on the active circuit, where the bumps are used as electrical and mechanical connectors. The die is then inverted and bonded to a substrate by means of the bumps. Several materials are commonly used to form the bumps on the die, such as conductive polymers or metal (solder bumps). If the bumps are solder bumps, the solder bumps can be used to form a solder joint between the die and the substrate. Regardless of how the die is attached to the substrate, a gap exists between the die and the surface of the substrate. Stress develops in the joints formed by the substrate bumps between the die and substrate because the die and the substrate have different coefficients of thermal expansion, different operating temperatures, and different mechanical properties. Therefore, in order to enhance the integrity of the joint, an underfill material is introduced into the gap between the substrate and die. The underfill material may be a variety of materials, such as aluminum oxide, silicon oxide, or polymeric materials. U.S. Pat. No. 6,066,509, issued to Akram et al., for example, discloses methods of filling the gap with underfill material. Prior art FIGS. 3a, 3b, and 3c show a flip-chip having an underfill material.
In FIG. 3a, a substrate 1 and a flip-chip 2 having bumps 4 are shown. FIG. 3b illustrates the result of connecting the substrate 1 to the flip-chip 2 by conventional direct chip bonding techniques such as soldering. Substrate 1 is typically made of ceramic, silicone, glass, and combinations thereof. In FIG. 3b, an electrical assembly is produced by placing and securing the flip-chip 1 on the top surface 8 of the substrate 1 having active circuitry thereon. Specifically, the bumps 4 are aligned with the contact pads (not shown) of the active circuitry located on the top surface 8 of substrate 1. The flip-chip 2 is then electrically and mechanically connected to the substrate 1 by curing or reflowing the bumps 4, depending on the type of material used. This process creates a gap 6 that is typically filled, in order to reduce stress. FIG. 3c illustrates that an underfill material 3 may be applied to fill the gap 6 between the flip-chip and the substrate 1.
Invariably, because of the wide variety of materials used in manufacturing a chip some alpha particle emissions will result, from a wide variety of sources.
In one aspect, the invention relates to a method for reducing soft error rates in semiconductor devices, where the method includes adding an isotopically enriched 11B compound when manufacturing the semiconductor device. Such compounds include orthoborates (B(OR)3), acyl borates (B(OCOR)3), peroxo borates (B(OOR)3), boronic acids (RB(OH)2), boron halides, boron hydrides, inorganic boranes, amine boranes, aminoboranes, carboranes, and borazines, where R is an alkyl group.
In one aspect, the invention relates to adding between 1% to 100% of isotopically enriched 11B compound to an underfill material in flip-chip assembly.
In one aspect, the invention relates to adding between 1% to 100% of isotopically enriched 11B compound to an encapsulent.
In one aspect, the invention relates to adding between 1% to 100% of isotopically enriched 11B compound to an adhesive.
In one aspect, the invention relates to adding between 1% to 100% of isotopically enriched 11B compound to a substrate.
In one aspect, the invention relates to using a boron/polymer composite as a packaging material.
In one aspect, the invention relates to using 11B as a dopant.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.